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GATE > Learn GATE Coaching > A 16 Kb (=16,384 bit) memory array is designed as a...
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A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is ________ ?

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Answer: 7. Explanation:- Generally the structure of a memory chip=Number of Row × Number of column (M*N) The number of address line required for row decoder is n where M=2^n or n=Log(base2) M. As per information given in the question: M=N So M*N= M*M= M^2=16k = 2^4 * 2^10 => M^2 = 2^ 14 M=128 n=...
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Answer: 7. Explanation:- Generally the structure of a memory chip=Number of Row × Number of column (M*N) The number of address line required for row decoder is n where M=2^n or n=Log(base2) M. As per information given in the question: M=N So M*N= M*M= M^2=16k = 2^4 * 2^10 => M^2 = 2^ 14 M=128 n= log(base2) 128 n=7. read less
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Ans is 7; as 16Kb=2^4*2^10=2^14 now memory = 2^(m*n);(m is no of column and n is no. of row) here m=n so 2^14=2^7*2^7 m=n=7
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